Austin Guerrero — Electrical Engineering Student

Digital hardware, analog circuits, and the odd vintage computer.

Austin Guerrero is an electrical engineering student at Valparaiso University, transferred in from Purdue University, and originally from Crown Point, Indiana. He works mostly in digital hardware — RTL design in SystemVerilog and FPGA verification — and analog circuit design. He is currently seeking a Summer 2027 internship in electrical or hardware engineering.

Currently seeking a Summer 2027 internship in electrical or hardware engineering.

Contact

Email: austin.guerrero@valpo.edu
Phone: 219-689-7468
GitHub: https://github.com/austinguerrero
LinkedIn: https://www.linkedin.com/in/guerrero-austin
Location: Crown Point, IN

Education

Valparaiso University — B.S. Electrical Engineering (Expected August 2028)
Purdue University — Electrical Engineering (transferred) (August 2024 – June 2026)
Ivy Tech Community College & Porter County Career and Technical Education — A.S. Computer-Aided Design and General Studies, Summa Cum Laude (May 2024)

Experience

Industrial and Materials Engineering Intern — National Material L.P.

East Chicago, Indiana · May 2025 – June 2026

Built a searchable engineering database of hundreds of steel specifications, cutting material search time by roughly 70%.
Automated material traceability workflows in Microsoft Dynamics AX, improving accuracy and reducing manual errors.

Undergraduate Researcher — Systems-on-Chip Enabled Technologies (SoCET), Purdue University

West Lafayette, Indiana · August 2024 – May 2025

Designed RTL modules in SystemVerilog using finite-state machines and synchronous digital logic.
Simulated and verified FPGA designs, building experience in hardware debugging and digital verification.
Worked alongside graduate researchers and industry engineers on semiconductor and FPGA design methodology.

Projects

FPGA Stopwatch System

VIP SoCET Research Project, May 2025

Designed a stopwatch in SystemVerilog using finite-state machines and synchronous digital logic. Simulated the functionality, deployed it onto FPGA hardware, then debugged timing and logic issues through waveform analysis.

Technologies: SystemVerilog, RTL Design, FPGA, Finite-State Machines, Waveform Debugging

12-Band Audio Equalizer

ECE 20007 Final Project, December 2025

Built a twelve-band analog equalizer from op-amp band-pass filter stages. Simulated the frequency response in LTspice, tuned each band's gain, then assembled and tested the physical circuit on the bench.

Technologies: Op-Amp Circuits, LTspice, Analog Filters, Frequency Response, Bench Testing

Steel Specification Database

National Material L.P., May 2025 – June 2026

Created a searchable engineering database of hundreds of steel specifications, cutting material search time by roughly 70%, and automated material traceability workflows in Microsoft Dynamics AX.

Technologies: Database Design, Microsoft Dynamics AX, Process Automation, Excel, VBA

EEG / Brain-Computer Interface Research

IEEE Systems, Man and Cybernetics Committee, August 2025 – Present

Ongoing research analysing brain-signal data: signal processing and interpretation of EEG recordings for brain-computer interface work.

Technologies: EEG, Signal Processing, MATLAB, Python, Data Analysis

Interactive Macintosh Portfolio Website

Personal project, 2026

A working System 7 desktop built by hand in a single HTML file with no frameworks: draggable windows, a real Finder with a persistent file system, Chess with an alpha-beta engine, MacPaint, Minesweeper and an animated dogcow.

Technologies: JavaScript, HTML5 Canvas, CSS, Web Audio API, Pixel Art

Technical Skills

Electrical

Circuit Analysis and Design
LTspice Simulation
Oscilloscopes and Lab Bench Instrumentation
Soldering and Breadboarding

Hardware

SystemVerilog / RTL Design
FPGA and Digital Logic
AutoCAD and SolidWorks (CSWA certified)
KiCAD PCB Layout

Software

MATLAB
Python
C
Excel, VBA and Pandas

Leadership and Involvement

IEEE — Systems, Man and Cybernetics Committee (August 2025 – Present) — Research analysing brain-signal data (EEG / brain-computer interface).
American Society of Mechanical Engineers (ASME) (August 2025 – Present)
Purdue “All-American” Marching Band (August 2025 – Present) — Nationally recognised ensemble; teamwork and precision under pressure.
Jazz Education Network, Purdue Chapter (August 2024 – Present) — Co-founder.
Student Mentor Ambassador, Porter County Career and Technical Education (August 2023 – May 2024) — Led tours for district leaders, military personnel and industry partners.

Awards and Honors

Purdue Tech Point Foundation for Youth — Full Ride Scholarship — March 2024
SkillsUSA Additive Manufacturing — Indiana State Finalist and National Qualifier — April 2024

About this website

This portfolio is an interactive recreation of a classic Macintosh desktop, designed and built by Austin Guerrero as a single HTML file with no frameworks. It includes draggable windows, a working Finder with a persistent file system, Chess against an alpha-beta engine, MacPaint, Minesweeper, an alarm clock, and Clarus the dogcow.

Plain-text version of this profile